Intel Collaborative Research Institute for Computational Intelligence
Heterogeneous Computing Platforms
The research team under Prof. Uri Weiser (Technion) will use an holistic system approach. The approach encompass HW solutions and user- and OS-level SW to the multiple facets of heterogeneous platforms (e.g., power management, scheduling, and memory sharing), while providing optimal solutions for multiple individual aspects arising in this context. This objective is broken into five interrelated pillars:
Optimal resource allocation. One of the basic themes of the team’s latest findings – the MultiAmdahl framework – will be used to expand the turf of optimal design for a range of problems/solutions: e.g. optimal on-die heterogeneous design, optimal system solution, cloud resource sharing, optimal scheduling, and more. The space of the optimal system targets under different limited resources will be explored. The formalization of the Targets vs. resources should enable researchers and designers to achieve new insights that will drive new research domains. The target of the optimal solution can be defined in different terms: e.g., maximum performance, minimum power, minimum energy, maximum performance/power etc. Resources may be defined individually, e.g., power, energy, area, cost, etc.
The MultiAmdahl framework will be applied to diversity of applications and marketing domains that have variety of desired targets and resource constrains. The Heterogeneous research results will be supported by a simulator (e.g. Simics based), running real benchmarks. The simulator will enable dynamics evaluation using machine learning algorithms of system constructed based on equations framework.
Heterogeneous Power management. Power managements will have centralized role in Heterogeneous systems. Dynamic power tuning may provide considerable improvements in system efficiency. The goal of this research is to achieve maximum performance within a power envelope, and minimizing power and energy consumption. The research will attempt to formalize the physical constraints to computation density, address power efficient architectures for a class of applications and propose formal controls and heuristics to manage power performance at the various levels.
Machine Learning-Based Scheduling. The research will investigate Future Heterogeneous scheduling based on machine learning. The system will collect behavior information of available tasks, using a dynamic optimal resource sharing (Dynamic MultiAmdahl based) to optimally assign OS tasks to the available heterogeneous HW. Scheduling and task assignments will be done by firmware based on OS characteristics of the ready tasks, available HW and dynamic evaluation of the optimal solution. The team will investigate the usage of machine learning and other techniques to optimally schedule tasks in a heterogeneous system.
HW-aware middleware SW. Programming multi-core hardware is widely considered one of the key challenges facing the computing world today. Heterogeneity, asymmetry, and novel cache architectures render the programming task even more daunting. We therefore contend that the usability of heterogeneous platforms critically relies on good programming abstractions, implemented as part of middleware services. This research will provide a range of abstractions for effective programming of parallel, heterogeneous systems. Seeking to provide standard OS abstractions, such as a file system abstraction, that can be utilized across diverse accelerators. Such abstraction would allow, for example, a CPU and a GPU to interact in a standard way using files, breaking the current restrictive master-slave computing model of GPU usage.
Data sharing. Sharing of data in today's computing systems comprising of multiple heterogeneous devices might be difficult, cumbersome, and accelerator-specific, both within the operating system and within the applications it supports. Systems that utilize accelerators must be written so that they can deal with the details and peculiarities of each different accelerator they use. The goal of this research is to unify the disjoint system-software/operating-system layers of memory management, developing a data sharing model for applications and accelerators in which sharing is made simple and seamless. The result would be better system’s performance/power-oriented software and applications, and a simplified programming model that increases productivity.
The research team plans a holistic approach to Heterogeneous system by merging some of the project into one coherent solution.
The research outcome will include:
First year deliverables:
Concept of the practical tools for optimal resource sharing.
Propose algorithms and heuristics to develop new power efficient CPU management methods.
Phase 1 of the programming abstractions to work the same way across a range of architectures.
Conceptual SW abstractions for HW idiosyncrasies such as LLC, NUMA, accelerators etc.
Unified framework for the multiple memory-management SW layers and data sharing models.
Long term (3 years) deliverables:
Provide practical tools for optimal resource sharing.
Programming abstractions that will work the same way across a range of architectures. The approach includes libraries to facilitate parallel programming, and OS-like abstractions for multi-process synchronization across heterogeneous processors.
Exploit the unified framework for the multiple memory-management SW layers and data sharing models for applications and accelerators in which sharing is made simple and seamless.
Efficient implementation of abstractions for HW idiosyncrasies like idiosyncrasies such as LLC, NUMA, amd accelerators, and their interfaces. Thus tackle a key obstacle towards widespread adoption of heterogeneous platforms with a multitude of computing units.
Significantly simplified and better performing system software and user applications, leading to a reduction in runtime overheads and increasing application development productivity, notably in domains that benefit from accelerators such as machine learning and data analytics.
Prof. Uri Weiser, Technion EE
Prof. Yoav Etsion, Technion EE/CS
Prof. Ran Ginosar, Technion EE
Prof. Idit Keidar, Technion EE
Prof. Isaac Keslassy, Technion EE
Prof. Dan Tsafrir, Technion CS
Jawad Haj-Yihia, Yosi Ben-Asher, Efraim Rotem, "Compiler Assessed CPU Power Management", Compiler, Architecture and Tools Conference, sponsored by HiPeac, Haifa , Israel, November 2013
Jawad Haj-Yihia, Yosi Ben-Asher, Efraim Rotem, " Superscalar Micro-Architecture and Compiler Techniques for Power Reduction”, submitted to ISPASS 2014